# K1446–K1450 PCI BAR device mapping contract

A decoded memory BAR may own a device mapping only when its nonzero physical
base and size are page aligned, the range does not overflow, and every page
lies inside a validated PCI memory aperture. I/O BARs and unassigned memory
BARs cannot reach this stage. The mapping uses Device-nGnRnE attributes;
normal cached memory attributes are forbidden for device registers.

The logical owner table has fixed capacity and forbids overlapping ranges.
A rejected claim leaves its previous snapshot unchanged. Releasing a claim
removes exactly that owner's range. The caller must install and verify page
table descriptors before publishing a live claim; on a mapping failure it
must remove newly installed descriptors and release the logical claim.

K1450 requires a disposable real PCI device in an isolated QEMU guest. The
guest must derive the PCI aperture from the DTB, assign and read back an
aligned BAR address if firmware left it unassigned, map the BAR pages as
Device-nGnRnE, and verify a bounded register read. It must restore PCI BAR
and command registers and remove mappings before returning. Local model tests
prove only range validation and logical ownership.