# K1451–K1455 PCI INTx routing contract

An INTx pin is one of INTA–INTD (encoded 1–4). Each upstream PCI bridge
rotates the pin by the downstream device number modulo four. The root PCI
host interrupt map then selects the GIC line using the outer bridge's root
slot and the resulting pin; that root slot is not swizzled again. The caller must
validate the endpoint BDF, every bridge BDF, and the host interrupt map
before publishing a route to a GIC SPI. A route owns one source BDF and pin;
the same source cannot be published twice. INTx is shareable, so distinct
sources may resolve to the same SPI. An ISR for a shared SPI must inspect
each possible device and acknowledge only the device that asserted it.

The local table has fixed capacity, rejects malformed pins, slots and SPI
numbers, and leaves prior routes unchanged on failure. Releasing a route
removes that exact source. K1455 must parse the real PCI host interrupt map,
measure the leaf's interrupt pin and the bridge swizzle path in an isolated
guest, and demonstrate an actual routed INTx assertion and acknowledgement
before recording development guest acceptance.